La carte mère ne possède pas de mémoire RAM intégrée, mais elle dispose de deux emplacements pour l'installation de cartes mémoires RAM appelées "R/W Storage". L'emplacement situé proche des slots d'extension périphériques est réservé à la mémoire de base, l'emplacement situé proche du connecteur d'alimentation est destiné à recevoir l'extension mémoire supplémentaire.

La carte mémoire RAM de 64Ko.
|
BUS d'EXTENSION MEMOIRE PRIMAIRE (BASE R/W)
|
A01 |
Storage bit 4 |
|
B01 |
Storage data bit 3 |
|
|
A02 |
Storage bit 2 |
|
B02 |
Storage data bit 1 |
|
|
A03 |
Storage bit 0 |
|
B03 |
Column Address Strobe 0 |
Contrôle de lignes |
|
A04 |
Column Address Strobe 2 |
Contrôle de lignes |
B04 |
Row Address Strobe 1 |
|
|
A05 |
Storage 1 64K |
|
B05 |
Row Address Strobe 1 |
|
|
A06 |
Write Enable |
|
B06 |
Row Address Strobe 1 |
|
|
A07 |
Column Address Strobe 1 |
|
B07 |
Row Address Strobe 1 |
|
|
A08 |
Storage bit 1 |
Contrôle de lignes |
B08 |
Not used |
Non utilisé |
|
A09 |
Ground |
Masse |
B09 |
Column Address Strobe 3 |
Contrôle de lignes |
|
A10 |
-5V |
-5V |
B10 |
Ground |
Masse |
|
A11 |
+12V |
+12V |
B11 |
Storage 1 Installed |
|
|
A12 |
Storage bit 2 |
|
B12 |
Storage data bit 5 |
|
|
A13 |
Storage bit 0 |
|
B13 |
Storage data bit 4 |
|
|
A14 |
Storage bit 6 |
|
B14 |
Storage data bit 3 |
|
|
A15 |
Column Address Strobe 4 |
|
B15 |
+5V |
+5V |
|
A16 |
Column Address Strobe 5 |
|
B16 |
Not used |
Non utilisé |
|
A17 |
Storage bit 6 |
|
B17 |
Storage data bit 5 |
|
|
A18 |
Storage bit P |
|
B18 |
Storage data bit 7 |
Storage data bit 7 |
|
 |
|
BUS d'EXTENSION MEMOIRE SECONDAIRE (FEATURE R/W)
|
A01 |
Storage bit 4 |
|
B01 |
Storage data bit 3 |
|
|
A02 |
Storage bit 2 |
|
B02 |
Storage data bit 1 |
|
|
A03 |
Storage bit 0 |
|
B03 |
Column Address Strobe 2 |
|
|
A04 |
Not used |
Non utilisé |
B04 |
Row Address Strobe 1 |
|
|
A05 |
Storage 2 64K |
|
B05 |
Row Address Strobe 1 |
|
|
A06 |
Write Enable |
|
B06 |
Row Address Strobe 1 |
|
|
A07 |
Column Address Strobe 3 |
|
B07 |
Row Address Strobe 1 |
|
|
A08 |
Storage bit 1 |
|
B08 |
Not used |
Non utilisé |
|
A09 |
Ground |
Masse |
B09 |
Not used |
Non utilisé |
|
A10 |
-5V |
-5V |
B10 |
Ground |
Masse |
|
A11 |
+12V |
+12V |
B11 |
Storage 2 Installed |
|
|
A12 |
Storage bit 2 |
|
B12 |
Storage data bit 5 |
|
|
A13 |
Storage bit 0 |
|
B13 |
Storage data bit 4 |
|
|
A14 |
Storage bit 6 |
|
B14 |
Storage data bit 3 |
|
|
A15 |
Column Address Strobe 6 |
|
B15 |
+5V |
+5V |
|
A16 |
Column Address Strobe 7 |
|
B16 |
Not used |
Non utilisé |
|
A17 |
Storage bit 6 |
|
B17 |
Storage data bit 5 |
|
|
A18 |
Storage bit P |
|
B18 |
Storage data bit 7 |
Storage data bit 7 |
|
 |
A l'instard des micro-ordinateurs Apple II ou le TRS-80, des connecteur permettant l'ajout de cartes électroniques étendant ses possibilités ou capacités. Ces connecteurs sont au nombre de quatre.

La carte contrôleur de disquettes 8"
|
BUS d'EXTENSION de PERIPHERIQUES (X4)
|
A01 |
I/O check |
|
B01 |
Ground |
|
|
A02 |
Data Bus bit 7 |
|
B02 |
Reset I/O |
|
|
A03 |
Data Bus bit 6 |
|
B03 |
+5V |
|
|
A04 |
Data Bus bit 5 |
|
B04 |
Not used |
|
|
A05 |
Data Bus bit 4 |
|
B05 |
-5V |
|
|
A06 |
Data Bus bit 3 |
|
B06 |
DMA Request 0 |
|
|
A07 |
Data Bus bit 2 |
|
B07 |
-12V |
|
|
A08 |
Data Bus bit 1 |
|
B08 |
Advanced Storage Read |
|
|
A09 |
Data Bus bit 0 |
|
B09 |
+12V |
|
|
A10 |
I/O Ready |
|
B10 |
I/O Cycle |
|
|
A11 |
I/O Address Enable |
|
B11 |
Storage Write to I/O |
|
|
A12 |
Page bit 3 |
|
B12 |
Storage Read to I/O |
|
|
A13 |
Page bit 2 |
|
B13 |
I/O Write |
|
|
A14 |
Page bit 1 |
|
B14 |
I/O Read |
|
|
A15 |
Page bit 0 |
|
B15 |
DMA Acknowlege 3 |
|
|
A16 |
Address Bus bit 15 |
|
B16 |
DMA Request 3 |
|
|
A17 |
Address Bus bit 14 |
|
B17 |
DMA Acknowlege 1 |
|
|
A18 |
Address Bus bit 13 |
|
B18 |
DMA Request 1 |
|
|
A19 |
Address Bus bit 12 |
|
B19 |
DMA Acknowlege 0 |
|
|
A20 |
Address Bus bit 11 |
|
B20 |
DMA Request 0 |
|
|
A21 |
Address Bus bit 10 |
|
B21 |
TP tx Interrupt |
|
|
A22 |
Address Bus bit 9 |
|
B22 |
TP rec Interrupt |
|
|
A23 |
Address Bus bit 8 |
|
B23 |
Interrupt Request 5 |
|
|
A24 |
Address Bus bit 7 |
|
B24 |
Disquette Interrupt |
|
|
A25 |
Address Bus bit 6 |
|
B25 |
Interrupt Request 3 |
|
|
A26 |
Address Bus bit 5 |
|
B26 |
Not used |
|
|
A27 |
Address Bus bit 4 |
|
B27 |
Terminal Count |
|
|
A28 |
Address Bus bit 3 |
|
B28 |
I/O Address Latch Enable |
|
|
A29 |
Address Bus bit 2 |
|
B29 |
+5V |
|
|
A30 |
Address Bus bit 1 |
|
B30 |
Clock to I/O |
|
|
A31 |
Address Bus bit 0 |
|
B31 |
Ground |
|
|
 |
|
|
|
Par la suite, les développeurs remprendront en grande partie du bus d'extension du 5322/24 pour concevoir celui de l'IBM 5150. Au rang des différences: les broches #A12 à #A15 correspondront respectivement au bus d'adresses A16 A19, la broche #B4 à IRQ2, la broche #B6 à DRQ2, la broche #B10 à la masse, la broche #B19 à -REFRESH, la broche #B20 à CLK, les broches #B21, #B22 et #B24 correspondront respectivement à IRQ7, IRQ5 et IRQ4, et enfin la broche #B26 à DMA Acknoledge 2.