TMS 9995 (CPU) TMS 9901 (interface programmable)
____________ ____________
| |__| | | |__| |
XTAL1 |1 40| A15 RST1* |1 40| Vcc
XTAL2 |2 39| A14 CRUOUT|2 39| S0
CLKOUT |3 38| A13 CRUCLK|3 38| P0
D7 |4 37| A12 CRUIN |4 37| P1
D6 |5 36| A11 CE* |5 T 36| S1
D5 |6 35| A10 INT6* |6 M 35| S2
D4 |7 T 34| A9 INT5* |7 S 34| INT7* / P15
D3 |8 M 33| A8 INT4* |8 33| INT8* / P14
D2 |9 S 32| A7 INT3* |9 9 32| INT9* / P13
Vcc |10 31| Vss PHI* |10 9 31| INT10* / P12
D1 |11 9 30| A6 INTREQ*|11 0 30| INT11* / P11
D0 |12 9 29| A5 IC3 |12 1 29| INT12* / P10
CRUIN |13 9 28| A4 IC2 |13 28| INT13* / P9
/INT4 |14 5 27| A3 IC1 |14 27| INT14* / P8
/INT1 |15 26| A2 IC0 |15 26| P2
IAQ |16 25| A1 Vss |16 25| S3
/DBIN |17 24| A0 INT1* |17 24| S4
/HOLD |18 23| READY INT2* |18 23| INT15* / P7
/WE |19 22| /RESET P6 |19 22| P3
/MEMEN |20 21| /NMI P5 |20 21| P4
|____________| |____________|
62256 (RAM Statique) MM58274 (Horloge Temps Réel)
____________ ____________
| |__| | | |__| |
A14 |1 28| Vcc CS* |1 16| Vdd
A12 |2 27| WE RD* |2 15| XTAL IN
A7 |3 26| A13 WR* |3 5 14| XTAL OUT
A6 |4 6 25| A8 D3 |4 8 13| INT*
A5 |5 2 24| A9 D2 |5 2 12| A0
A4 |6 2 23| A11 D1 |6 7 11| A1
A3 |7 5 22| OE D0 |7 4 10| A2
A2 |8 6 21| A10 Vss |8 9| A3
A1 |9 20| CS |____________|
A0 |10 19| D7
D0 |11 18| D6
D1 |12 17| D5
D2 |13 16| D4
Vss |14 15| D3
|____________|
41256/HM50256 (DRAM) 41464/HM50464 (DRAM)
____________ ____________
| |__| | | |__| |
A8 |1 16| Vss OE* |1 18| Vss
D IN |2 15| CAS D1 |2 17| D4
WE* |3 4 14| D OUT D2 |3 4 16| CAS*
RAS* |4 1 13| A6 WE* |4 1 15| D3
A0 |5 2 12| A3 RAS* |5 4 14| A0
A2 |6 5 11| A4 A6 |6 6 13| A1
A1 |7 6 10| A5 A5 |7 4 12| A2
Vcc |8 9| A7 A4 |8 11| A3
|____________| Vcc |9 10| A7
|____________|
27C128 (EPROM) SN76496 (Audio)
____________ ____________
| |__| | | |__| |
Vpp |1 28| Vcc D2 |1 16| VCC
A12 |2 27| /P D1 |2 S 15| D3
A7 |3 26| A13 D0 |3 N 14| CLOCK
A6 |4 25| A8 READY |4 7 13| D4
A5 |5 24| A9 WE* |5 6 12| D5
A4 |6 23| A11 CE* |6 4 11| D6
A3 |7 22| /G AUDIO OUT|7 9 10| D7
A2 |8 21| A10 GND |8 6 9| AUDIO IN
A1 |9 20| /E |____________|
A0 |10 19| D7
D0 |11 18| D6
D1 |12 17| D5
D2 |13 16| D4
Vss |14 15| D3
|____________|
V9938 (Contrôleur vidéo) MC1733 (Amp. vidéo différenciel)
____________ ____________
| |__| | | |__| |
MASSE |1 • 64| XTAL2 INPUT 2 |1 14| INPUT 1
DHCLK* |2 63| XTAL1 NC |2 M 13| NC
DLCLK* |3 62| RAS* G2B |3 C 12| G2A
VDS* |4 61| CAS 0* G1B |4 1 11| G1A
HSYNC |5 V 60| CAS 1* Vee |5 7 10| Vcc
CSYNC |6 59| CAS X* NC |6 3 9| NC
BLE0 |7 9 58| Vcc OUTPUT 2 |7 3 8| OUTPUT 1
CPUCLK/VDS* |8 9 57| R/W* |____________|
RESET* |9 5 56| AD7
YS* |10 8 55| AD6
CBDR |11 54| AD5
C7 |12 53| AD4
C6 |13 52| AD3 PAL16R4A
C5 |14 51| AD2 (circuit logique programmable)
C4 |15 50| AD1 ____________
C3 |16 49| AD0 | |__| |
C2 |17 48| RD7 CLK |1 20| VCC
C1 |18 47| RD6 I |2 P 19| I/O
C0 |19 46| RD5 I |3 A 18| I/O
MASSE DAC |20 45| RD4 I |4 L 17| Q
VIDEO |21 44| RD3 I |5 1 16| Q
V |22 43| RD2 I |6 6 15| Q
R |23 42| RD1 I |7 R 14| Q
B |24 41| RD0 I |8 4 13| I/O
INT* |25 40| CD0 I |9 A 12| I/O
PLS* |26 39| CD1 GND |10 11| OE*
PLD* |27 38| CD2 |____________|
MODE 1 |28 37| CD3
MODE 0 |29 36| CD4
CSW* |30 35| CD5
CSR* |31 34| CD6
CD7 |32 33| Vbb
|____________|
M60014 (circuit logique prédifusé, programmé par masque)
W
E
A -
1 /
5 C
/ M R C
C E D U L
R M B C K
O A E I L O
U 1 A A A A A A A A A A N N K U
T 4 1 1 1 1 A A A A 5 4 3 2 1 0 - - - T
3 2 1 0 9 8 7 6
1 1 8 8 8 8 8 7 7 7 7 7
1 0 9 8 7 6 5 4 3 2 1 4 3 2 1 0 9 8 7 6 5
__________________________________________
/ O |
12 | | 74 RC1
13 | | 73 RC4
CAS- 14 | | 72 D7
RAS- 15 | | 71 D6
CAS- 16 | | 70 D5
17 | | 69 D4
RA0 18 | | 68 D3
RA1 19 | | 67 D2
RA2 20 | M60014 | 66 D1
RA3 21 | (côté composants) | 65 D0
Vcc 22 | | 64 Vss
RA4 23 | | 63 READY
RA5 24 | | 62 RESET-
RA6 25 | | 61 NMI-
RA7 26 | | 60 CRUCLK-
RA8 27 | | 59 IAQ/HOLDA
KBD DATA 28 | | 58
KBD CLK 29 | | 57 PIA CS-
KBD INT- 30 | | 56 VDP CSW-
31 | | 55 VDP CSR-
READY 32 | | 54 RTC CS-
|__________________________________________|
3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 4 5 5 5 5
3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3
H D H D A A A A V A A A A X S C R M S
O B O B M M M M c M B B B R R L O A O
L I L E E D C B c A 0 1 2 A A O M P U
D N D N M M C I N
A - K C O D
/ C C O S -
A S S U - C
B T S
U
S
75 77 79 81 83 1 3 5 7 9 11
76 78 80 82 84 2 4 6 8 10 13
_______________________________________________
| \
| O O O O O O O O O O O |
74 | O O O O O O O O O O O O O | 12
| |
72 73 | O O O O | 15 14
| |
70 71 | O O O O | 17 16
| |
68 69 | O O O O | 19 18
| |
66 67 | O O O O | 21 20
| M60014 |
64 65 | O O (côté soudures) O O | 23 22
| |
62 63 | O O O O | 25 24
| |
60 61 | O O O O | 27 26
| |
58 59 | O O O O | 29 28
| |
56 57 | O O O O | 31 30
| |
54 | O O O O O O O O O O O O O | 32
| O O O O O O O O O O O |
|_______________________________________________|
55 52 50 48 46 44 42 40 38 36 34
53 51 49 47 45 43 41 39 37 35 33
74LS245 (Tampon bidirectionnel 8 bits)
________
| |__| |
DIR |1 20| VCC TABLE DE VERITE
A1 |2 19| OE* +-------------+-------+
A2 |3 18| B1 | ENTREE | SORTIE|
A3 |4 17| B2 +------+------+-------+
A4 |5 16| B3 | OE* | DIR | OP |
A5 |6 15| B4 |------+--------------|
A6 |7 14| B5 | L | L | B->A |
A7 |8 13| B6 | L | H | A->B |
A8 |9 12| B7 | H | X | isol |
GND |10 11| B8 +------+------+-------+
|________|
74LS244(octuple tampon à trois états)
________
| |__| |
1G* |1 20| VCC TABLE DE VERITE
1A1 |2 19| 2G* +-------------+-------+
2Y4 |3 18| 1Y1 | ENTREE | SORTIE|
1A2 |4 17| 2A4 +------+------+-------+
2Y3 |5 16| 1Y2 | G* | A | Y |
A13 |6 15| 2A3 |------+--------------|
2Y2 |7 14| 1Y3 | L | L | L |
1A4 |8 13| 2A2 | L | H | H |
2Y1 |9 12| 1Y4 | H | X | Z |
GND |10 11| 2A1 +------+------+-------+
|________|
